1. Field of the Invention
The present invention relates to a semiconductor device, particularly to a semiconductor device having a lead frame, and more particularly to a lead frame for ball grid array, a semiconductor device having it, and a process for producing it.
2. Description of the Prior Art
Recent semiconductor devices need a higher degree of integration and more functions than before to meet requirements for electronic machines and equipment which are improving in performance and becoming light in weight and small in size. However, this need is not met by conventional QFP (Quad Flat Package) which becomes larger in size and whose external terminals become narrower in pitch as the number of lead frame pins increases. As the result, lead frames are more liable to deformation and defective mounting is liable to occur more frequently.
In order to eliminate this disadvantage, there has been developed the ball grid array (BGA) which uses external terminals with solder balls for the mounting of a semiconductor device.
The BGA enables the lead frame to have more widely pitched external terminals and hence it enables the number of external terminals to increase without adverse effect on the mounting of semiconductor devices.
The lead frame for BGA is usually constructed as shown in FIG. 4. It is formed by etching or pressing. Like conventional QFP, it is designed such that a semiconductor chip is mounted on the die pad and the forward ends of the inner leads are connected by wire bonding to the terminals of the semiconductor element. It differs from QFP in that the terminals for mounting are ball bumps.
The conventional lead frame shown in FIG. 4 suffers the disadvantage that the forward ends 2 of the inner leads with terminal ball bumps 1 have extremely narrow spaces because they are connected by wiring bonding to the semiconductor element. Producing such lead frames with high precision by etching or pressing is necessarily low in yields.